SystemC Evolution Day 2020

Workshop on the Evolution of SystemC Standards
Thursday, October 29, 2020
Virtual Online Workshop

The fifth SystemC Evolution Day was a full-day, technical workshop on the evolution of SystemC standards to advance the SystemC ecosystem. In several in-depth sessions, selected current and future standardization topics around SystemC will be discussed in order to accelerate their progress for inclusion in Accellera/IEEE standards.

SystemC Evolution Day is intended as a lean, user-centric, hands-on forum bringing together experts from the SystemC user community and the Accellera Working Groups to advance SystemC standards.

Date: 29 October 2020 (day after DVCon Europe 2020)
Time: 8:30 - 19:30 CET
Location: Virtual Online Workshop

Organization Team:

  • Ola Dahl, Ericsson (Chair)
  • Martin Barnasconi, NXP
  • Jerome Cornet, STMicroelectronics
  • Christian Sauer, Cadence
  • Mark Burton, GreenSocs
  • Daniele Ludovici, Intel


Time (CEST)     Title Presenter(s) Affiliation(s)
8:30 - 9:00 Welcome and Introduction
Ola Dahl Ericsson
9:00 - 10:00 A SystemC TLM 2.0 Extension for the Model Exchange of Off-Chip Communication Protocols
G. Stazi, V. Di Valerio, S. Sinisi, A. Ulisse, S. Soffia Raytheon Technologies Research Center Italy
10:00 - 11:00 Multi core debugger integration in OSCI SystemC
Peter de Jager Intel
11:00 – 11:30 Update from Accellera Working Groups
Martin Barnasconi Accellera
11:30 – 12:00 Open Discussion
13:00 – 15:00 Virtual Networking
16:00 - 17:00 Towards a Standardized Multi Language Verification Framework
Warren Stapleton1,
Bryan Sniderman1,
Alex Chudnovsky2,
Faris Khundakjie3,
Martin Barnasconi4
17:00 - 18:00 Temporal assertions in SystemC
Mikhail Moiseev, Leonid Azarenkov, Ilya Klotchkov Intel
18:00 - 19:00 Matchlib: A New Open source Library to Enable Efficient Use of High Level Synthesis
Stuart Swan Mentor, A Siemens Business
19:00 – 19:30 Summary and Conclusion Discussion

SystemC Evolution Day Goes Virtual

by Ola Dahl

Entering the digital conference era, the Accellera SystemC Evolution Day 2020 will follow the example set by DVCon Europe, and become a virtual event. This will make things different, of course, but it will also enable new possibilities.

The overall intent remains: We want to gather the SystemC community, and we want interesting presentations and creative discussions and debates, advancing the standards.

Our call for contributions closed on July 10, 2020. As stated in the call for contributions, we welcomed “contributions on ideas for additions and improvements to SystemC and its further standardization." For the choice of topic, you might want to relate to ongoing activities in Accellera working groups, covering the “SystemC language, Transaction level Modeling (TLM), Configuration, Control & Inspection (CCI), Analog/Mixed Signal (AMS), High-level Synthesis (HLS), and Verification”. We will post the full agenda soon - stay tuned!

We are eager to hear about your insights from own projects, applications and studies, as well as continuations and follow-ups from previous System Evolution Days. Looking back at previous events (we had SystemC Evolution Days in 2016, 2017, 2018, and 2019), you might want to pick a topic that has been on the agenda before, or you might want to bring in fresh insights and new angles on SystemC.

Regarding how the actual workshop will be run, we are working on that, together with the DVCon Europe Steering Committee – stay tuned, and more info will follow.

For additional inspiration, you might want to have a look at topics from earlier years, as presented by tagcrowd – based on a personal (and clearly unscientific) summary from the presentation material:

Contact us

Special thanks to the SystemC Evolution Day event sponsors:

CadenceSiemens EDASynopsys