SystemC Evolution Day 2019

Workshop on the Evolution of SystemC Standards
Thursday, October 31, 2019
Holiday Inn Munich City, Germany

The fourth SystemC Evolution Day was a full-day, technical workshop on the evolution of SystemC standards to advance the SystemC ecosystem. In several in-depth sessions, selected current and future standardization topics around SystemC will be discussed in order to accelerate their progress for inclusion in Accellera/IEEE standards.

SystemC Evolution Day is intended as a lean, user-centric, hands-on forum bringing together experts from the SystemC user community and the Accellera Working Groups to advance SystemC standards.

Date: 31 October 2019 (day after DVCon Europe 2019)
Time: 9:30 - 18:00 CEST
Location: Holiday Inn Munich City Centre, Hochstrasse 3, 81669 Munich, Germany Registration fees: €25 (Advance until 27 Sept) | €35 (on-site) plus 19%VAT

Organization Team:

  • Oliver Bell, Intel (Chair)
  • Martin Barnasconi, NXP
  • Andrew Stevens, Infineon
  • Ola Dahl, Ericsson
  • Philipp A. Hartmann, Intel
  • Volkan Esen, Infineon
  • Ingo Feldner, Bosch
  • Tran Nguyen, ARM
  • Manfred Thanner, NXP
  • Jerome Cornet, ST


Time (CEST)     Title Presenter(s) Affiliation(s)
8:30 - 9:00 Welcome coffee
9:00 - 9:30 Introduction, Brief SystemC WG Standardization Update
Oliver Bell1
Martin Barnasconi2
9:30 - 10:15 SystemC and Digital Twin: Good match or Not?
Martin Barnasconi NXP
10:15 – 10:45 Coffee break – hosted by Accellera
10:45 – 12:30 Simulation, Kernel Technology, Tracing
Pushing the Limits of Standard-Compliant Parallel SystemC Simulation
Rainer Dömer University of California, Irvine
Synchronizing simulators, and Save and Restore
Mark Burton Greensocs
Improving the Usability and Performance of Tracing in SystemC
Rauf Salimi, Philipp Hartmann Intel
12:30 – 13:45 Lunch break - courtesy of Accellera, Cadence, Mentor A Siemens Business, and Synopsys
13:45 – 15:00 TLM, Interoperability, Metrics
Methodology for defining bus specific Programmer’s View extensions to TLM2.0
Umesh Sisodia, Prince Arora CircuitSutra
Technologies Pvt Ltd
Follow up on GP extension standard, Clock and Reset SC standard
Joachim Geishauser NXP
SystemC Modeling Metrics
Ingo Feldner, Tim Kraus Bosch
15:00 – 15:30 Coffee break – hosted by Accellera
15:30 – 17:00 Model Creation, High Level Synthesis
Re-envisioning CCI inspection
Bill Bunton1, Philipp Hartmann1,
Michael Lebert2, Ola Dahl2
Advanced assertion checking in SystemC High-Level Synthesis flows
Bob Condon Intel
17:00 – 17:30 Wrap-up & Closing

Contact us

Special thanks to the SystemC Evolution Day event sponsors:

CadenceSiemens EDASynopsys